JEDEC STANDARD Board Level Drop Test Method of Components for Handheld Electronic Products JESDB JULY JEDEC SOLID. The reliability of this package has been studied by employing the JEDEC JESDB standard drop test. In this paper, the JEDEC B-condition is applied to. The need for RoHS compliant boards coupled with the demand for reliable electronics has resulted in the development of the JEDEC Standard JESD B to.

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All comments will be collected and dispersed to the appropriate committee s.

The fundamental mode results in maximum displacements and is typically most damaging. This shall be accomplished by designing double sided boards with mirror component footprint on each side top and bottom of the board.

Table 1 provides the thickness, copper coverage, and the material for each layer. This test method is not meant to address the drop test methods required to simulate shipping and handling related shock of electronic subassemblies.

The electrical failures may result from various failure modes such as cracking of circuit board, trace cracking on the board, cracking of solder interconnections between the components and the board, and the component cracks.

JESDB B Board level drop test menthod of components for handheld eletronic products_百度文库

Because of symmetric component design and support locations, grouping see Table 6 can be used for data analysis for boards mounted with 15 components refer Figure 1.

This is pictorially shown in Figure 3.

Depending on the strike surface, same drop height may result in different G level and pulse duration. Due to limited sample size and number of drops specified here, it is possible that enough failure data may not be generated in every case to perform full statistical analysis.


Experiments with different strike surface may be needed to achieve the desired peak value and duration. I recommend changes to the following: Each additional test point shall be clearly labeled using row column format of the package. However, this is an additional test option and not a replacement for testing in required orientation.


JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally.

Because of various design for test and design for failure analysis practices used in the industry, it is recognized that populating boards with all 15 locations may not b111 enough room between components for large number of test points to properly identify the exact failure location. The method is applicable to both area-array and perimeter-leaded surface mounted packages. Drop Test Simulation o Sample sizes greater than specified below can be used to generate statistically sufficient data.


Both accelerometer and stain gage shall be connected to data acquisition system capable of measuring at a scan frequency of 20 kHz and greater with a 16 bit signal width. The locations of these holes are shown in Figure 1. Electrical continuity test shall also be performed on all mounted units to detect any opens or shorts. All 15 sites on each side of the board top and bottom shall have the same component footprint.

The purpose is to standardize the test board and test methodology to provide a reproducible assessment of jesc22 drop test performance of surface mounted components while duplicating the failure modes normally observed during product level test.

The electrical resistance of each net shall be measured in-situ during each drop and all failures shall be logged. Since a typical product board may have a combination of microvia in pad and no vias in pad for area array packages for routing purposes, it is required that such components BGAs, Kesd22, etc be tested on board with both microvia and non-microvia PCB pads.

The test boards shall be assembled using best known methods of printed circuit assembly process, representative of production methods. Figure 3 shows the typical drop test apparatus where the drop table travels down on guide rods and strikes the rigid fixture. Strain rate shall also be calculated by dividing the change in strain value by the time interval during which this change occurred. A continuity test instrument capable of detecting electrical discontinuity of resistance greater than ohms lasting for 1 microsecond or longer.


JEDEC standards and publications are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. Although it is recommended that this characterization be performed for previously untested components, this may not be required if such characterization data is available for similar sized component.

No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met.

The composite values Modulus, and Tg shall be measured on at least one representative test board at component mounting location. The first event of intermittent discontinuity as defined above followed by 3 additional such events during 5 subsequent drops. Kesd22 with different board orientation has suggested that the horizontal board orientation jexd22 components facing down results in maximum PCB flexure and, thus, the worst orientation for failures.

It is recommended that boards should be inspected and accepted as per IPC-A, Class 3 acceptability criteria. The use of shoulder screw eliminates the need to re-tighten screws between drops.

By downloading this file the individual agrees not to charge for or resell the resulting material. The rigid fixture typically is covered with some form of material to achieve the desirable pulse and G levels. The failure data can only be pooled together when they have been proved to be statistically equivalent. In addition, a rectangular rosette strain gage shall be mounted on this set-up board underneath position U8 on the other side non-component side of the board to characterize strains in x and b11 directions as well as the principal strain and principal strain angle.

The free-fall drop height of the drop table needed to attain the prescribed peak acceleration and pulse duration. The die size and thickness should be similar to the functional die size to be used in application.